As each layer of a semiconductor device is fabricated, it is critical to product integrity that the wafer be aligned so that subsequent layers of a device are fabricated proximate, within a specified tolerance, to corresponding underlying layers. This alignment is typically effected by imaging alignment marks on the wafer.
A portion of a typical photolithographic process proceeds as follows. A wafer proceeds on a track to a photoresist application device. Liquid photoresist is applied to the wafer and excess photoresist is spun off. There is no need to align the wafer at this point as the photoresist is applied uniformly across the wafer. After application of the photoresist, the wafer is heated to harden the photoresist and then cooled for further processing. The wafer then enters a receive cassette where it is pre-aligned before proceeding to the product-imaging device (e.g., stepper or scanner). Typically the wafer has an orientation indicator, which may take the form of a notched or flattened area of the wafer to facilitate pre-alignment. A typical tolerance for pre-alignment may be approximately 8.5 microns for x-axis and y-axis orientation and 100 microradians (μrads) for rotational orientation. The pre-alignment places the wafer within a capture range for the more accurate imaging process to follow.
The pre-aligned wafer then proceeds on a stage under a product-imaging device. For example, the stepper (i.e., stepper and repeater). The stepper is an optical system that projects the reticle pattern onto the wafer to image the desired pattern. A typical stepper has a lens that can image a 22 mm×22 mm field with sub-micron resolution.
The wafer is stepped in both the x-axis and y-axis orientation to affect the imaging of an array of fields across the wafer. Each field can contain one or multiple products (e.g., transistors).
To facilitate alignment from one product layer to the next, alignment marks are imaged in each field. The alignment marks at each product layer are used to align the imaging device at the next product layer for each die. For example, a laser interferometer system may be used to reset the stage based upon the alignment marks on the previous layer. This technique is known as cascading alignment because alignment marks on each product layer are used for alignment of a subsequent product layer.
To avoid loss of die area on the wafer due to the placement of alignment marks in the product fields, the alignment marks may, instead, be placed in the scribe lines. The disadvantage with having the alignment marks in the scribe lines is that the alignment marks are difficult to maintain through the subsequent processing steps (e.g., the planarization process).
Systems with limited stage accuracy and/or limited resolution may use multiple alignment marks because the stage may not be accurate enough to align with the markings to within a desired tolerance. That is, there may be as few as one alignment mark in each field, though typically, due to limited stage accuracy, there are multiple alignment marks per field. For such systems, the average offset of multiple alignment marks may typically be used after discarding aberrational values.
Cascading alignment has the disadvantage of compounding misalignment from one product layer to the next. Moreover, die-by-die alignment is time consuming.
These disadvantages can be addressed, for systems employing more accurate stages (e.g., less than 10 nm), by employing a two-point global, zero-layer, alignment-mark imaging scheme. For such a scheme, the accuracy of the stage allows two alignment marks to define the entire wafer, which means that die-to-die alignment is unnecessary. The alignment marks are placed outside of the product field array, and therefore, do not use die area. Moreover, each product layer is aligned to the initial reference layer (zero-layer) alignment marks rather than to alignment marks on the previous product layer. Such zero-layer alignment prevents the compounding of misalignment that is possible with a cascading alignment scheme.
For two-point global, zero-layer alignment, all that is typically required is two marks, each of which is approximately 400 microns across. Typically, these marks are imaged on a wafer using the same imaging device that is used to image the product fields (i.e., a stepper or a scanner). Typically, one of the two alignment marks is imaged and then the wafer is accurately stepped to allow imaging of the other alignment mark across the wafer in the desired location within a specified tolerance. This accurate placement of the wafer is possible due to a highly accurate stage.
The typical alignment mark dimensions are such that an imaging field of 1 mm2 is more than sufficient, yet the typical stepper has an image field several hundred times as large. The typical resolution required for an alignment mark is approximately 8 microns, yet typical steppers have sub-micron resolution. The use of the highly accurate stepper, or scanner, to image, which must be within the pre-align station capture range alignment marks, is highly inefficient as such imaging devices are expensive and their use adds to production costs.